Formal Verification

Placeholder author icon
By Erik Seligman ’91

Published Feb. 2, 2016

Formal Verification: An Essential Toolkit for Modern VLSI Design demystifies formal verification (FV) and presents the practical applications that are bringing it into mainstream design and validation processes at Intel and other companies. The book will prepare working engineers to introduce FV in their organizations and deploy FV techniques to increase design and validation productivity.

Paw in print

Image
An inside look up the inside of a building, with four floors and a dinosaur skeleton visible.
The Latest Issue

April 2026

Inside the new ES and SEAS complex; kudos for austerity; jazz at Princeton.